Hyperdimensional Computing Using Time-To-Spike Neuromorphic Circuits
Authors: Graham Bent, Christopher Simpkin, Yuhua Li, and Alun Preece ( Cardiff University, Cardiff, UK )
Presentation type: Poster
Hyperdimensional Computing (HDC), or Vector Symbolic Architectures (VSAs), are a family of bio-inspired methods for symbolizing and manipulating concepts and their meanings using fixed-size vector representations in a high-dimensional vector space. Eliasmith, using spike frequency encoding, has shown how these vector representations can be used to perform `brain like’ neuromorphic cognitive processing and coined the phrase ‘semantic pointer’ for such a vector since it acts as both a ‘semantic’ description of the concept and a ‘pointer’ to the concept. This paper describes how the mathematical operations required by HDC/VSA (e.g., binding, bundling, clean-up memory) can be performed using a simple time-to-spike encoding model and demonstrates how these basic functions are implemented in ‘time-to-spike’ neuromorphic circuits using Brian2 simulations. In previous work a distributed hierarchical HDC/VSA memory model has been described. The model uses a combination of vector binding and bundling operations such that vectors at higher levels in the hierarchy represent higher sematic abstractions of the lower-level concepts. The model has been used to demonstrate how distributed command and control operations can be performed in low bandwidth communications networks. This leads to the intriguing question of how these might be analogous to similar process in biological brains or conversely if known neural mechanisms might be exploited to perform the same tasks. The paper shows how an unbounded hierarchical memory model can be implemented using time-to-spike neuromorphic circuits and discusses the implications for the design of future neuromorphic processors that would be required to efficiently perform these operations.